# MASTER PROFILE — Joaquín Braulio González Jiménez

> **Purpose:** Consolidated master profile knowledge base. This is NOT a CV — it is a comprehensive pool of facts, projects, skills, and achievements for downstream CV agents to match against job descriptions. One unified entry per company; duplicates merged with all details preserved.
>
> **Job titles:** every position in Professional Experience (the early-career mini-entries excepted) lists a **Contract title** (what the employment contract said) and a **Working title** (what the role actually was) on separate labeled lines. Downstream agents must use one of these two lines as given — never merge them, never invent a third title.

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## Personal Information

- **Full Name:** Joaquín Braulio González Jiménez
- **Date of Birth:** 29 July 1981 (29/07/1981)
- **Nationality:** Spanish
- **Primary Address:** Rue des Coopératives 9, 1217 Meyrin, Genève, Switzerland
- **Mobile:** +41 79 191 91 85
- **Email:** Joaquin@Gonzalez.team
- **LinkedIn:** [linkedin.com/in/joaquinbgonzalez0](https://www.linkedin.com/in/joaquinbgonzalez0)
- **Driving Licenses:** A, B
- **Professional experience:** 18 years of engineering experience, counted from October 2008 (AICIA).

**Tags:** `spain` `switzerland` `geneva` `eu-national` `relocatable`

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## Education & Certifications

**Universidad de Sevilla**

- BSc in Telecommunication and Electronic Engineering
- MSc in Telematics (degree completed October 2013)
- Specializations: Telematics & Automation, Electronics, Communication Networks, Low-Level Programming, Prototyping, Communication Protocols, System Architecture
- **MSc Thesis:** Designed a high-performance control system for a tunable laser using low-cost FPGA (TMBragg 3) — the working technology demonstrator of a broader technology later patented by Temai Ingenieros S.L. Awarded Magna cum laude with honors, by unanimous decision of the committee.

**Certifications & Courses**

- Certified Project Manager Professional, Project Management Institute (PMI-PMP)
- Certified LabVIEW Associate Developer (CLAD)
- Python and TypeScript Course (EPFL)
- Accountability & teamworking course (Fred Kofman)
- FIDE French language certificate (A2/B1)
- Daily user of Microsoft Office, OpenOffice, and Linux distributions

**Tags:** `bsc-telecommunications` `msc-telematics` `pmp` `clad` `fpga` `epfl` `python` `typescript` `electronics` `networking` `system-architecture` `fide-french`

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## Professional Experience

### Gonzalez.team SARL — Founder & Consulting Engineer
- **Contract title:** Founder / Owner (SARL)
- **Working title:** Consulting engineer, systems & software architect

**2024 – present | Geneva, Switzerland**

**Role Overview:** Founded Gonzalez.team SARL (Geneva, 2024), an independent engineering consultancy delivering small, concrete-problem projects: embedded device firmware and architecture, home and building automation, web applications, solar feasibility studies, and self-directed R&D. The defining axis of the last year is agentic AI: full integration of LLM-based agent systems at every level of the development cycle — implementation, project management, process automation, and the design of working methodologies and protocols.

**Key Contributions:**

- **Scanbox (July 2026 – present, for consultancy Fortil; end client: a luxury-goods group):** system architect for an embedded exhibition device (PoC) built on Raspberry Pi CM4 (embedded Linux) that controls motors, lights, and cameras to display luxury items (watches, pens) — moving and rotating them, lighting them at varying intensities and colors, and photographing them from multiple perspectives at multiple resolutions. Core client requirement delivered: the device connects to a Windows PC as a standard UVC webcam — no drivers, nothing to install — via USB gadget mode, multiplexing two cameras into a single video stream with live camera switching. Took over the internal architecture definition, centralized device management, containerization of all components (Docker), the hardware-control subsystem, and the interface contracts between subsystems (including the Qt-based local UI, whose takeover is in progress); delivered beyond contract a C# demonstration library for Windows USB clients, a demo app, and a device-served web app that can also run locally against the client PC's USB. Stack: Python, shell, PowerShell, HTML/CSS/JS, embedded Linux (Raspberry Pi 4 / CM4), Docker, libcamera, kernel patches, USB gadget UVC, Qt, gRPC, Protocol Buffers. Two separate development teams (himself, plus a professor and a student in Grenoble), coordinated over shared online development and test benches.
- **cv_creator / JobHunter (process started September 2024):** designed and built an end-to-end LLM application that generates tailored CVs and cover letters from a job posting — Python 3.11 / Flask 3.1 behind Apache2 + mod_wsgi, vanilla-JS front end (7 modules, 3,149 lines), token-by-token SSE streaming into a live A4 preview, PDF export via headless Chromium (Playwright 1.40). 74 Python modules, ~20k lines in the application alone.
  - Four-node agentic pipeline (Writer → Evaluator → Editor → Auditor) with an iterative convergence loop capped at 6 iterations: it exits only when measured page occupancy is in band AND the Auditor reports no change. Editor work is parallelized across field groups with a ThreadPoolExecutor.
  - Anti-hallucination Auditor node: every generated field is judged against a ground-truth master profile attached on each call — what keeps a generative pipeline from inventing experience.
  - Multi-provider LLM router over Anthropic, Google Gemini, and DeepSeek (7 registered models, raw REST per provider, no vendor SDK) with quota-aware fallback: HTTP 429 is classified into "no quota" vs "daily quota exhausted", the failing model is persisted as unavailable, and the call walks an ordered fallback chain — silently for automated callers, or as a user-facing choice with a countdown for interactive ones.
  - Deterministic layout measurement with Playwright/Chromium against explicit occupancy bands (85-100% for the letter page, 90-100% for CV pages), correcting by a computed scale factor instead of a text-length guess; a persistent Chromium server (20-minute idle timeout, auto-restart) keeps each measurement at 3-4 s.
  - JobHunter: unattended three-stage job-hunting pipeline running on cron in production — Gmail API ingest (hourly, Mon-Fri) → deterministic JD fetch plus DeepSeek scoring on an anchored 0-100 rubric → Claude re-scoring through a quota-window scheduler → automatic dossier generation and email summary. Trello is the queue; idempotency markers on each card are the state contract.
  - Made LLM scoring reproducible: anchoring the rubric and pinning temperature cut the inter-run standard deviation on the same posting from ~11 points to 0-4.5, measured across five models.
  - Defeated Indeed's Cloudflare TLS-fingerprint blocking with curl_cffi browser impersonation and reactive residential-IP rotation over SSH tunnels, with per-portal request pacing and a 24-hour fetch cache.
  - Cost engineering: Anthropic prompt caching (cache_control ephemeral, 5-minute TTL) and DeepSeek off-peak scheduling; a measured 8,937 cached prompt tokens at zero cache-creation cost on repeated scoring calls.
  - Deployed and operated on a Raspberry Pi under Docker Compose (separate dev and prod services from a multi-stage Dockerfile), with one-command disaster recovery: git clone plus a single deploy script rebuilds everything on a clean host. Secrets are age-encrypted into a committed file and decrypted only inside the container, with the passphrase passed over stdin — never as a command-line argument or a container environment variable. Daily incremental backup to a NAS over SSH.
  - 748 automated tests across 41 modules, run exclusively inside the container through make targets, with pytest markers segregating unit, integration, browser, and token-spending LLM suites.
  - Production figures: one dossier chains 10-20 LLM calls and takes a median 41 minutes with extended thinking enabled (1-3 minutes with it off), measured over 42 real generations; over 114 dossiers generated to date.
  - Operates fully autonomously in the background, 24/7; human interaction remains possible at nearly every stage — from handing the webapp a job description it writes the whole dossier from, to per-field editing with real-time rendering.
- **Home & building automation:** designed and delivered automation installations for homes and a commercial premises (the PTO project) — Home Assistant, Zigbee, Tuya devices, TTLock smart locks, custom integrations (e.g. Tuya window sensors triggering the MysAir air-conditioning shutdown), energy-consumption monitoring, booking-driven room and lighting automation, and domestic hot water (ACS) control; plus Docker, Flask, Python and HTML/CSS tooling, structured cabling (Ethernet and electrical), and UPS batteries. On PTO he also ran the works themselves: construction management, supplier management, and negotiation with specialist teams.
- **Solar feasibility studies:** small photovoltaic projects up to 15 kW in different contexts, using the EU energy-transition agency's online tools and spreadsheet calculations. PTO Phase 2 is one of them: needs were studied first, then candidate locations — every urban option was discarded for lack of space and architectural conditions, leaving the rural site as the only viable and most scalable option.
- **Retiro (April – September 2023, predating the SARL):** real-estate investment feasibility study — small temporary-housing units for short/medium-stay workers and researchers near CERN, with IoT and comfort automation as the competitive edge for a tech-friendly audience. Market, financing, and viability studies; several candidate properties located; a funding round with a budget between €400k and €1M came close to its target, but the margin for budget overruns was too thin and the project was discarded — its financing work opened the way to PTO.
- **GLNode (infrastructure; first nodes deployed 2022, formalized as the GLNode24 project in 2024):** private international device-deployment network — a WireGuard/OpenVPN mesh VPN with star-topology liveness control between nodes (health, states, alarms), on Docker over Debian/Raspbian (Raspberry Pi). GLNode1 and 2 were deployed in 2022 as an exploration; the GLNode24 project began in 2024 when a real need justified the effort — managing the IoT system of the Thoiry deployment. Today 7 nodes across 3 countries: gln0, 1, 6, and 7 co-located in Geneva as test and work benches; gln2, 3, and 4 deployed in Thoiry (France), Barcelona, and Seville (gln5 no longer exists). Supporting infrastructure for the other projects; scanbox uses the GLNode network to form a closed development ring between devices, work benches, and PCs across Grenoble, Geneva, and Eysins.
- **Agent-based development methodology ("Gameland", internal):** designs, directs, and operates a cross-project multi-agent development methodology, kept in a canonical repository and mirrored verbatim into each consuming project with hash-verified integrity (pinned source commit, per-file dual SHA-256 inventory); in continuous use across his active projects (cv_creator, scanbox, and others).
- The methodology defines a git workspace protocol for concurrent AI agents (one agent, one branch, one worktree; `--no-ff` integration), a multi-agent team protocol with role separation and a per-seat model-capability gate, a two-tier documentation system (always-current living docs vs an append-only session diary), and a quota-governance protocol with a built-in falsifiability test against prompt-injection impostors (the quota supervisor operates on two machines).

**Technical Environment:** Python 3.11, Flask, vanilla JavaScript, Bash, PowerShell, HTML/CSS; LLM APIs (Anthropic Claude, Google Gemini, DeepSeek), prompt engineering, multi-agent orchestration, anti-hallucination auditing, prompt caching, quota-aware scheduling, structured JSON output with tolerant parsing; Docker & Docker Compose, Apache2/mod_wsgi, Playwright/Chromium, cron, age encryption, SSH tunneling; embedded Linux (Raspberry Pi 4 / CM4), libcamera, kernel patches, USB gadget UVC, Qt, gRPC, Protocol Buffers; Gmail API, Trello REST API, curl_cffi; Home Assistant, Zigbee, Tuya, TTLock; WireGuard, OpenVPN.

**Tags:** `founder` `consulting` `llm` `agentic-ai` `agent-based-systems` `ai-assisted-software-engineering` `prompt-engineering` `multi-agent-orchestration` `anti-hallucination` `prompt-caching` `python` `flask` `javascript` `bash` `powershell` `docker` `apache` `playwright` `sse-streaming` `rest-api` `gmail-api` `trello` `raspberry-pi` `embedded-linux` `usb-uvc` `libcamera` `kernel-patches` `qt` `grpc` `protobuf` `home-automation` `home-assistant` `zigbee` `tuya` `ttlock` `solar-pv` `wireguard` `openvpn` `vpn-mesh` `devops` `disaster-recovery` `secrets-management` `automated-testing` `documentation-methodology` `system-architecture` `self-employed`

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### LEM International — Senior Innovation Engineer (Innoteam)
- **Contract title:** Senior Electronic Engineer
- **Working title:** Senior Innovation Engineer / device architect (also: R&D engineer, electronic engineer, firmware engineer, prototyping engineer)

**7 February 2022 – 1 June 2024 | Meyrin, Geneva, Switzerland | Innoteam (innovation team)**

**Role Overview:** As Innovation Engineer within LEM's Innoteam, drove forward-looking research to anticipate global societal and customer needs in sensors and metering solutions. Focused on bridging AI, IoT, and smart systems to position LEM as a first-mover in future markets. Managed innovation projects end-to-end, balancing technical execution with business strategy. Owned four core duties: Technology Scouting (identified emerging technologies aligned with market trends), Project Management (end-to-end execution from ideation to PoC), Stakeholder Collaboration (liaised with product managers and customers to align solutions with business needs), and Technical Development (led cross-disciplinary teams in prototyping and deployment).

**Key Contributions:**

- **WSS — Self-supplied overhead power-line health meter (G21011R, project opened 2021, he joined LEM and this project in 2022):** the first development of the energy-harvesting technology — a split-core PMU (Phasor Measurement Unit) for high-voltage lines built from 3-5 isolated, self-powered modules drawing energy from the line itself by resonant coupling (capacitive vs inductive was part of the research; 5-10 year autonomy target), measuring current phase (DAQ, pre-analysis, and communications), communicating wirelessly, distributing GPS-sourced precise timing across the nodes, and aggregating data traffic towards the one node with an external 4G connection. The <1 µs time-distribution target proved unreachable — the ESP32's internal clock carries an intrinsic manufacturing error above that value — and the achieved milestone was clock synchronization of 35 µs over Wi-Fi: three ESP32 microcontrollers, one hosting a hotspot and the others connecting to it, exchanging 1-to-1 UDP messages over an ad-hoc synchronization protocol he designed for the purpose, pushing performance to the limit of the controller. Design-stage work only: the harvester was designed and simulated, the controller explored (ESP32 on TinyPICO boards), and parts of the firmware written and validated — the Wi-Fi communications and the clock-synchronization experiments — plus the GPS integration providing the start tick; the client cancelled the project before the first harvester was built. His tasks: the device firmware (C, bare-metal on ESP32), communications management, the GPS integration, and the clock-synchronization capability demonstrations.
- Developed IoT firmware in C for EV charging and smart grids on ESP32 (FreeRTOS/ESP-IDF); evaluated and prototyped on STM32 as a secondary platform.
- **Tanganyika — Energy Metering IoT (G22011R):** extension of the DCBM, LEM's already-launched energy meter for EV chargers, with external communication capabilities — a BeagleBone Black (embedded Linux) module collecting the meter's data, preprocessing it, and sending it to the cloud (the BeagleBone's Wi-Fi during tests; 2G/4G planned), preparing the DCBM's integration as an AWS IoT device for data aggregation and customer-facing platforms. His role was primarily project management — coordination, follow-up, and negotiation across the parties: the Lyon software team (communications module in the DCBM firmware), a colleague in Geneva (the BeagleBone firmware), the Amazon team (AWS integration), and corporate IT (deployments, permissions, security); the hands-on AWS fleet work — provisioning, authentication, token lifecycle (see the AWS bullet below) — was his own in this context.
- **Kariba — Self-supplied power monitoring (G22013R):** follow-up reusing much of the WSS technology — a single self-powered prototype, with no connection to any power source, measuring alternating current through three Rogowski coils on medium/low-voltage lines, absorbing the needed energy with the harvesting technology developed in WSS. His own proposal (backed by a Global Product Manager — the same who brought WSS), directed integrally and developed single-handed: project management, research, purchasing, prototype development, the LabVIEW test bench, and the device firmware; reused the AWS systems created for Tanganyika as the data backend. Demonstrated every capability except the harvesting rate: the electronics worked, the DAQ responded when powered, the communication modules connected, the swarm system responded, the AWS dashboards showed real data, and the LabVIEW bench managed and verified everything — but the harvester did not charge the batteries fast enough (energy losses somewhere unknown, above what the simulation predicted); he proposed testing a competitor supplier's harvesters, whose numbers on paper looked likely to solve the problem, but it was not authorized. Prototyped on ESP32/STM32 microcontrollers.
- **Assal — «The Box» (G23006R):** his own proposal (rejected twice, approved on the third pass), worked on alone: architecture design for a multi-purpose, modular, and scalable DAQ system for reading and transmitting sensor data — modules able to read the sensors of LEM's different product lines, plus communication-adaptation modules for the different scenarios: Ethernet, Bluetooth, Zigbee, Wi-Fi, or 4G, among others. Architecture and design work, with technology and market prospecting, a review report of the company's products, and a pre-design of each product's connection module; it never reached a prototype — capability simulations reused what was already implemented in Tanganyika and Kariba.
- **ML Pilot in operations (230505A):** took part in an internal multi-department commission — an external partner's initiative — studying the potential of an LLM system to preserve corporate know-how, in a context of imminent know-how loss (retirement of the engineers who had led most of the company's key product developments) and an IT policy that banned commercial LLMs and online translation services.
- Built automated test frameworks (Python, C, C#, LabVIEW) for IoT edge devices and systems, including self-powered sensors and cloud-integrated PMU clock synchronization.
- DevOps: automated workflows for IoT edge devices and containerized cloud/edge flows with Docker to develop them in parallel; streamlined IoT edge workflows via AWS cloud integration and cost-performance optimization.
- AWS cloud integration: IoT Core, Greengrass, Lambda, and data lakes — with the main focus on fleet provisioning and authentication, from generation and first contact through the live maintenance of access tokens and device deployment.
- Web UIs for sensor data built on Flask (Python + HTML/CSS/JS).
- Integrated serial wired ports into wireless/mobile communication systems.
- Managed wireless/mobile communications, power harvesting systems, and cloud integration; specialized in high-complexity systems: ultra-high-accuracy and isolated measurement systems, self-powered devices with energy harvesting, time-critical synchronization (PMU), and integrated IoT architectures with wireless/mobile communications and cloud data pipelines.
- AI technology scouting: explored applying proprietary ML methods learned at Cogito (classical ML, three-layer neural networks using RBF and KNN) to LEM metering problems — training and inference in computational models, as desk studies that did not reach hardware or production.
- Future Forecasting: analyzed 3-, 5-, and 10-year R&D horizons to identify emerging trends in sensors, IoT, and AI, aligning R&D with future demands; conducted market studies to align R&D priorities with emerging IoT/AI trends.
- Advised Global Product Management (GPM) on innovation strategies and technology investments; advised product managers on technical feasibility, market alignment, and R&D roadmaps (consultancy role).
- Board-to-developers liaison: bridged technical execution with strategic innovation goals; translated complex technical concepts into actionable strategies for non-technical stakeholders.
- Spearheaded cross-functional teams to deliver innovation projects from ideation to PoC; partnered with engineering, product, and executive teams to align R&D with business goals.
- Spearheaded Agile (sprints) and Waterfall (phased) methodologies for prototyping and SDLC-driven solutions; collaborated on design verification tests (DVT) and traceability matrices for compliance with SDLC phases.
- Guided junior engineers in Agile workflows, IoT firmware development, and cloud solutions.
- Pioneered R&D in low-power smart sensors, wireless communication (LoRa, BLE, Wi-Fi) with encryption for secure fleet deployment in IoT ecosystems.
- Designed ultra-low-power electronics and scalable IoT architectures for industrial and consumer sensor applications.
- Developed rapid Proofs of Concept (PoCs) and prototypes to validate cutting-edge solutions; resolved cross-departmental challenges using automation and data analytics.
- Strategic Impact: shaped LEM's innovation pipeline by identifying high-potential technologies (e.g., encrypted IoT networks); reduced time-to-market for next-gen products through agile prototyping.

**Technical Environment:** IoT stack (LoRa, BLE, Wi-Fi wireless protocols), embedded systems, energy-efficient design; ESP32 (FreeRTOS/ESP-IDF, firmware in C), STM32 (evaluated/prototyped), BeagleBone Black, embedded Linux; Python, C, C#, JavaScript (Flask web UIs); LabVIEW; Docker; AWS cloud (IoT Core, Greengrass, Lambda, data lakes); rapid prototyping tools, data visualization platforms, IoT security frameworks.

**Tags:** `iot` `edge-computing` `embedded-firmware` `esp32` `stm32` `freertos` `esp-idf` `beaglebone` `embedded-linux` `aws` `aws-iot-core` `greengrass` `lambda` `cloud-integration` `devops` `docker` `test-automation` `python` `c` `csharp` `javascript` `labview` `flask` `clock-synchronization` `udp` `pmu` `rogowski` `smart-grid` `ev-charging` `energy-harvesting` `low-power` `wifi` `lora` `ble` `zigbee` `wireless` `encryption` `iot-security` `fleet-deployment` `sensors` `metering` `technology-scouting` `innovation-management` `r&d-strategy` `market-analysis` `agile` `waterfall` `sdlc` `dvt` `poc-development` `rapid-prototyping` `mentoring` `stakeholder-management` `cross-functional-leadership` `executive-advisory` `senior-engineer`

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### Cogito Instruments SA — Solution Engineering Manager
- **Contract title:** Application Engineer (senior level: Senior Application Engineer)
- **Working title:** Solution Engineering Manager (business-card title; in charge of complete projects end-to-end — system architect, R&D engineer, electronic engineer, project manager, firmware/software engineer, prototyping engineer)

**27 August 2018 – 31 July 2021 | Geneva, Switzerland**

**Role Overview:** Spearheaded end-to-end development of AI-driven industrial applications and hardware systems, aligning technical solutions with market demands. Led cross-functional teams in delivering prototypes and production-ready products while interfacing directly with customers, sales, and C-suite executives. Work spanned many exploratory projects, proofs of concept, and feasibility studies, mostly in collaboration with client companies; for greenlighted projects he prepared the architecture and assisted the client teams that deployed them, and drove two projects end-to-end himself (DCblue, and Core1 — his own initiative to solve recurring customer problems).

**Key Contributions:**

- Developed a machine vision system based on an AI neural network in hardware (proprietary prototype developed personally, end-to-end) for a pick&place robot for automated production lines — the [DCblue machine vision system](https://www.youtube.com/watch?v=COZeOGKKnf0) for robot guidance, developed for and later commercialized by [SunRock Technologies](http://www.sunrock-tech.com); integrated machine vision with Core1, demonstrating its industrial applicability. Before the project's direction was settled, the client had handed him a small demonstrator of their own as an aesthetic guide of what they wanted to see; on that base he learned VisualBasic, then .NET and C#, and it was once he was programming autonomously that he developed the real DCblue application. Built the test bench himself — a Basler industrial camera and a pick&place robot driven by ASCII commands over a UART — integrated on a miniPC running a C#/.NET (WPF) application connected to a selectable analysis device from the ecosystem: the Core1 (once available) or the CI-9210 cartridge over Ethernet, through new software speaking the ecosystem's protocol and API. The system could be trained by a field operator simply by showing it the part type to recognize; with automated data augmentation it then found parts of identical geometry and color even when partially occluded, in different positions and angles, or under extremely adverse or changing light. Ran from mid-2019 until the end of the company and was never formally closed: the prototype was built and being shown at trade fairs, the work finished and delivered, open to further evolutions within the SunRock collaboration.
- **DeepScan:** machine-vision quality-inspection application for surface defects and breakage in industrial machinery parts, built in LabVIEW on the company's NI-cRIO cartridge with its on-chip RBF/KNN neural network: image capture (first from file, later from a camera), artificial-vision preprocessing (OpenCV, NI Vision Software Suite), part localization, and the network's verdict on each part and its state. An early exploration (2018-2019, ~3 months) in collaboration with Olilab and SunRock; it did not take off — the Olilab association ended there, but the SunRock collaboration continued and gave birth to DCblue.
- Led full SDLC for embedded AI systems (CI-Core1 FPGA platform, DCblue machine vision).
- **Core1 Hardware Platform (his own initiative):** pivoted from National Instruments frame hardware-based AI solutions (the CI-9120 cartridge line: proprietary ML with RBF/KNN, closed frameworks costing customers thousands per year) to designing Core1, a modular, expandable, and standalone hardware platform for scalable neural networks based on standard programming languages and communication protocols, built around the newer NM500 neuromorphic chip (Nepes) in place of the previous CM1K. Redesigned the architecture to eliminate bottlenecks and cleaned the whole signal path, with better drivers and more efficient external communications shaped to what the neural network needs: measured gains over the previous platform of ~50% faster bus communication and up to 100× faster training and inference in the ideal case. Developed a modular, AI-capable system for image analysis/pattern recognition featuring a proprietary communication protocol and expansion port for custom mezzanine boards; certification-ready first prototype meeting all requirements. The product was pre-initiated through the «Impulse-DelocPro» project under the InnoSuisse initiative, which funded the preliminary studies and part of the first prototypes: prepared from September 2019, kickoff in November 2019 for 12 months, with development continuing to the end — the Core1 was finished and in its certification phase when the general stop order came (April 2021); two prototype batches had been produced (3 and 12 boards), the code was finished, and a bus design flaw had been detected and corrected, with a new batch sent to manufacture to raise the speed to the hardware's real limit, when operations stopped. Personally designed the communication protocol, wrote the complete device firmware, the host-side drivers, the test benches, and the first demonstration applications, extending the firmware as new capabilities and communication interfaces were needed; directed the project — work-package planning, distribution and coordination, sourcing, BOM and supplier management — and outsourced the schematic refinement, the PCB layout, and the production of the first two prototype batches, and delegated the VHDL IP blocks for controlling the neural-network bus from the FPGA to a colleague. Agile project management (new to the company) saved up to 9 weeks of development time; the project reached beta-ready state 5 weeks before deadline.
- Transitioned the company's main product (linked to proprietary National Instruments platforms) to FPGA-based hardware-software ecosystems.
- **VIP Project (for Caran d'Ache):** led and delivered the [Visual Inspection Package (VIP)](https://www.youtube.com/watch?v=L-kudPcAW9Y) — 100% automated surface quality inspection of the production line using machine vision and AI, inserted into the client's integrated production bench. Designed the application and qualified the partner company (Angara Technologies) in the technology, so they could develop the PoC hardware and finish the LabVIEW application on top of his hardware and drivers.
- **Clemessy (Eiffage):** delivered AI cartridges for NI-cRIO plus a training course on their use; the client then ran an exploration project on the technology for early fault detection.
- **GF Machining Solutions / Charmilles (project GF_Pace):** supported their early production-fault detection system, integrated into their high-end machines performing nano-milling by electrical impulses, monitoring in real time whether the milling was going well; helped design the control software they integrated into their machines. Designed for them an additional communications system enabling a cRIO with the AI cartridge to be driven over a TCP/IP network interface. Designed customer-specific Core1 firmware for them — started bare-metal, then migrated the architecture to FreeRTOS. GF motivated and co-funded part of the CI-Core1 project; the first (and only produced) Core1 mezzanine board was designed for them — adding Ethernet and EtherCAT connectivity and an SD-card reader; the CAB1 could be powered from a supply or over PoE, and in turn powered the Core1 through the expansion bus (the Core1 itself accepted power through its own connector, over USB, or from the expansion bus) — and with it Ethernet communication over the Core1 system was validated; EtherCAT and PoE were never validated before development stopped.
- **CI-Core API — the integration ecosystem:** designed the architecture of a complete ecosystem of integrated products — hardware and software: drivers, communications and protocols, data formats, interfaces — around an abstraction layer (CI-Core API) that isolates the application layer from the RBF/KNN learning/inference engine behind one common API, served interchangeably by any device in the catalog: the Core1, the CI-SOM (real hardware — it spoke only SPI — or through the SOM-EMU emulation interface, which began as a cRIO + CI-9120 emulating the CI-SOM over SPI and soon moved to Ethernet), the CI-9120 (through a re-edition of its drivers, listening on Ethernet with the Core1's optimized protocol), or a fully emulated device (Cogitool) — so a customer could build and validate an application without buying hardware, then move it unchanged onto a real device from the catalog. He personally wrote the adaptation layer carrying the full CI-Core API protocol over a TCP socket — C# libraries on the client side and LabVIEW libraries for the server running on the cRIO. SOM-EMU ended fully functional and was used to debug and validate the Core1 during its test phase: it detected and demonstrated inference problems in the first prototype through automated comparative input/output tests with random numbers and synthetic datasets, integrating on a single computer the Core1 over USB and the cRIO over the network. Phase 1 closed successfully; phase 2 — a C++ simulator under CI-Core API, for teams not running LabVIEW — was never started, its role covered by that set of C# and LabVIEW libraries. The project was multi-stage: it began by generalizing the protocols designed for the Core1 and then developed each product's adaptation layer as it became needed — first the Core1, then SOM-EMU bringing the CI-9120 into the ecosystem over the TCP socket. Included the Cogitoolbox suite of image- and data-preprocessing tools (open libraries such as OpenCV and licensed ones such as ImageSharp and NI Vision Builder). The preparation phase was completed, along with parts of the implementation; development of the ecosystem was not concluded.
- Delivered production-grade automated test scripts in C and C# for neural network hardware; conducted risk analyses (pFMEA) for the DCblue machine vision system.
- Machine Vision & AI: edge computing, neural accelerators, predictive maintenance, 100% automated quality inspection — architectures prepared for and deployed with client teams across exploratory and production projects.
- Led customer validation processes and iterative testing for production-grade solutions; trained customers on product use and troubleshooting.
- Customer/partner relationship management: collaborated with SunRock Technologies for DCblue machine vision productization; collaborated directly with the COO and CEO during customer visits and feasibility assessments — assessing technical feasibility, estimating resources, and guiding client-facing technical discussions.
- Analyzed customer needs to define requirements for prototypes and production systems; managed teams in software development (LabVIEW, C#, .NET), hardware design (FPGA-based systems), and prototyping; oversaw firmware (ANSI C), driver development, communication protocols, and testing frameworks. C++ used in the integration layer between the firmware and the C#/.NET user application.
- Scheduled project timelines, task allocations, and resource allocation for Agile workflows, ensuring on-time delivery of FPGA-based neural network hardware.
- Integrated Agile (software) and Waterfall (hardware) workflows for AI-driven solutions.
- Firmware in ANSI C; Windows drivers and host-side tooling in C#/.NET; Azure DevOps for version control.
- Managed resource allocation, vendor partnerships, and hardware procurement.

**Impact:** Transitioned the company from National Instruments closed frameworks for AI solutions to a scalable, standard hardware-software ecosystem; delivered certification-ready (Core1) and market-ready (DCblue) products while enhancing technical credibility with partners and clients (Clemessy/Eiffage, GF Machining Solutions/Charmilles, Caran d'Ache, SunRock Technologies).

**Technical Environment:** AI/ML (proprietary RBF/KNN frameworks, neural network optimization, NM500/CM1K neuromorphic chips); Core1 platform (FPGA design), modular systems; communication protocols (SPI, I2C, USB, Ethernet, EtherCAT, TCP/IP, custom); LabVIEW, ANSI C, C++ (firmware↔.NET integration layer), C#, .NET, embedded systems, Windows drivers; NI-cRIO; Azure DevOps; Agile prototyping, resource/time estimation, cross-team coordination.

**Tags:** `machine-vision` `ai-hardware` `neural-networks` `neuromorphic` `nm500` `fpga` `edge-ai` `rbf-knn` `industrial-automation` `robotics` `pick-and-place` `quality-inspection` `predictive-maintenance` `labview` `ansi-c` `c-cpp` `csharp` `dotnet` `windows-drivers` `embedded-systems` `spi` `i2c` `usb` `ethernet` `ethercat` `tcp-ip` `ni-crio` `rtos` `freertos` `custom-protocols` `innosuisse` `pfmea` `risk-analysis` `sdlc` `agile` `waterfall` `test-automation` `hardware-architecture` `pcb` `product-development` `productization` `certification` `customer-facing` `customer-training` `c-suite-collaboration` `vendor-management` `procurement` `resource-planning` `team-leadership` `engineering-manager` `management-level`

---

### CERN — R&D Engineer and Solutions Architect
- **Contract title:** Scientific personnel (User), 2015–2016, via Universidad de Sevilla as home institution (funded by AICIA); Spanish Trainee, 2016–2018, employed by CIEMAT (Madrid) and deployed at CERN
- **Working title:** R&D Engineer and Solutions Architect

**1 July 2015 – 30 June 2018 | Geneva, Switzerland**

**Team:** EP-DT-DD (Detector Technologies group), SSD (Solid State Detectors team) under Michael Moll; RD50 Collaboration (radiation-hard semiconductor devices for HL-LHC). Time split equally between [SSD](https://ssd-rd.web.cern.ch) and [CMS HGCAL](https://cms.cern/news/new-era-calorimetry) (High Granularity Calorimeter). ([Projects at CERN — resume PDF](https://indico.global/event/5832/contributions/48145/attachments/23923/40649/5th_FTEC_workshop_v1.0._Joaquin_Gonzalez.pdf))

**SSD Team (RD50 Collaboration):**

- In charge, throughout the stay, of creating, maintaining, improving, and upgrading the team's experimental test benches — production work whose job was making setups faster, safer, and more precise for the researchers using them, without corrupting measurements or dying mid-way through multi-day DAQ runs. Built from scratch: RSLandau, SiPM_at_SuSi, and the HGCAL hexaboard leakage-current test bench; improved: eTCT and the Skiroc test bench.
- Wrote from scratch the data-taking (DAQ) software for the RSLandau setup (measures silicon detector response to beta particles), implementing a fully parallel architecture — the first in SSD.
- Redesigned and rewrote the TCT+ control software (Transient Current Technique for laser-based charge collection studies) until virtually nothing of the original remained: turned a giant tangle of state machines nested inside state machines into a data-acquisition system of multiple subsystems working in parallel under a producer-consumer architecture, communicating through work queues and data packets — an 8× speed/throughput improvement on an already-optimized experimental setup. Rebuilt piece by piece while the setup remained in permanent use: the replacement was prototyped in a mock without instrumentation, then swapped in piece by piece without ever leaving the setup unavailable for more than 2 hours at a time. Published as TCT+_basic v1.0.4 and adopted by the RD50 collaboration. Documentation: [SSD Project PDF](https://indico.cern.ch/event/642073/contributions/2605220/attachments/1481088/2296719/SSD-Solid_State_Detectors_170622.pdf).
- Hardware EMI mitigation on the eTCT experiment — a laser focused from the side onto sub-millimeter structures of diodes and other solid-state devices, inside a Faraday cage, extremely sensitive to external noise and to noise induced by its own instrumentation and cabling: shielding, grounding, and enclosure isolation using EM techniques and waveguide technology boosted SNR by 23 dB.
- Designed and produced a cooling system for the edge-TCT setup, including mechanical design of a cooling plate and metallic box (Autodesk Inventor 3D drawings, MATLAB simulations, LabVIEW integration); collaborated with CERN mechanical workshops (EP-DT-EF).
- Mechanical design using Autodesk Inventor & Fusion for cooling systems; redesigned cooling systems for edge-TCT setups.
- Developed LabVIEW control software for the Laird PR-59 Peltier driver, including libraries and utilities; embedded into TCT+_basic and other thermal subsystems.
- Characterized thermal measurement errors, leading to PCB redesign of sample holders to isolate sensors from common ground and avoid measurement errors.
- Built laboratory instrumentation for radiation-hardened sensor characterization.
- Performed hypothesis testing (LabVIEW/MATLAB) for ASIC radiation hardness validation.
- Upgraded DAQ infrastructures using Waterfall phases for sensor characterization.
- Dataset Management: configured and deployed centralized, secure storage for the team on CERN's EOS service, with cloud access (Web, SFTP, SMB, NFS); developed BUT v1.0, a parallel producer-consumer software for secure automated file copying, optimized across hardware configurations.
- Developed modular LabVIEW programs for irradiated-sensor measurements; maintained responsibility for software development, setup scheduling, and hardware/software maintenance.

**CMS HGCAL (High Granularity Calorimeter):**

- Wrote LabVIEW (v14) test/control software to characterize frontend ASICs (Skiroc2, Skiroc2_CMS) for dynamic range, crosstalk, linearity, and noise analysis; software adopted by CMS members. Built the test bench for the Skiroc readout ASIC designed for the hexaboards of the new CMS endcap.
- Designed and implemented the 2017 beam-test data storage pipeline — 50 TB/week, 2.1 Gb/s sustained with 8.6 Gb/s peak throughput: designed, procured, assembled, and commissioned the multi-channel DAQ communications backplane, aggregating data on a commercial HP server able to buffer, retain, and re-send data packets over two-three alternating 10 Gb/s links into a direct fiber connection from the North Area experimental facility (Prévessin) to CERN's Meyrin data centre, onto the EOS service — collaborating with CERN IT/EN departments to establish the fiber links. Zero storage-related downtime across several measurement campaigns, despite last-minute specification changes during the beam tests.
- Leakage Current Studies (hexaboards): proposed and built the setup that discovered the root cause of the anomalous leakage currents in the hexaboard v1.1 silicon sensor modules — a manufacturing error in the gluing of the PCBs — by stress-testing the boards under climate-controlled temperature and humidity while forcing data capture through a dummy injector in the ROC; control software, DAQ, and simulations on SSD facilities. The result optimized module assembly procedures in production.
- Built the reception-validation bench for incoming hexaboards: an automated input/output data check run on each board on arrival.
- Safety Systems: contributed to the design of HGCAL experiment safety subsystems, collaborating with HGCAL, EP-CMX, and CERN safety experts.
- Authored technical documentation and test reports for the CMS HGCAL calorimeter.
- Domain: high-throughput data storage (8.6 Gb/s peak), radiation-hardened sensor characterization, parallel computing.

**RD50 Collaboration & Other Projects:**

- SiPM Characterization: developed modular LabVIEW programs for SiPM sensor characterization; designed PCBs (Altium Designer) and cooling/thermal chunks (Autodesk Inventor) for thermal stability; managed production of all parts. Co-authored the resulting work, presented by A. Heering at the FAST Congress (Ljubljana, Slovenia) and at the 14th Pisa Meeting on Advanced Detectors (Elba, 2018).
- RPC Fast-Timing Project: co-authored a JINST paper (Journal of Instrumentation, 2017) on electrostatic compensation methods to suppress modal dispersion in serpentine-configured RPCs (100 ps timing); reduced readout channels by 10× while maintaining coverage. Simulated strip lines for waveguide behavior and impedance matching.
- Lab IT: set up and secured Linux/Windows file services (BASH, NFS, Samba) for the test benches feeding the high-throughput data pipelines.
- System Integration: integrated cooling, thermal control, and DAQ systems for experimental setups.

**Additional Roles & Collaborations:**

- Workshops & Conferences: participated in all RD50 workshops of the period (Geneva: Dec 2015, Dec 2016, Nov 2017; Krakow: Jun 2016) and co-organized (support role) the CERN-hosted ones; presented the HGCAL detector performance talk at CALOR2018 (University of Oregon, USA).
- Joined the CMS-Sevilla group (July 2017) under Dr. F.R. Palomo — a group set up after his arrival at CERN.
- Collaborations: IFCA (Instituto de Física de Cantabria, Santander), CNA (Centro Nacional de Aceleradores, Seville), and IMB-CNM (Instituto de Microelectrónica de Barcelona, CSIC), among 10+ international institutions.
- Leadership: mentored interns and managed/led cross-disciplinary, multidisciplinary teams for SSD and CMS HGCAL collaborations.

**Key Outcomes:** Delivered mission-critical software/hardware for CMS HGCAL and SSD experiments; published peer-reviewed research on RPC optimization and SiPM irradiation; improved SNR by 23 dB on the eTCT experiment (hardware EMI work) and data-taking speed by 8× (TCT+ parallel producer-consumer architecture); zero downtime for 50 TB/week beam-test storage.

**Technical Environment:** LabVIEW (v7.11–2016), MATLAB, BASH; Altium Designer, Autodesk Inventor/Fusion/CAD; FPGA programming (Xilinx), PCB design, thermal systems (Peltier), EMI analysis; CERN EOS, parallel computing, data storage/management (50 TB/week); Linux/Windows networking (NFS, Samba, SFTP, SMB).

**Tags:** `cern` `particle-physics` `detector-technologies` `cms` `hgcal` `calorimetry` `silicon-sensors` `radiation-hardness` `rd50` `hl-lhc` `asic-characterization` `skiroc2` `daq` `labview` `parallel-architecture` `big-data` `high-throughput` `eos-storage` `data-pipeline` `tct` `sipm` `rpc` `fast-timing` `jinst` `peer-reviewed-publication` `emi-mitigation` `snr-improvement` `faraday-cage` `waveguide` `impedance-matching` `thermal-control` `peltier` `cooling-systems` `pcb-design` `altium` `autodesk-inventor` `matlab` `bash` `linux` `windows` `nfs` `samba` `networking` `safety-systems` `system-integration` `laboratory-instrumentation` `mechanical-design` `hypothesis-testing` `technical-documentation` `mentoring` `team-leadership` `international-collaboration` `conference-speaker` `scientific-research` `ciemat` `spanish-trainee`

---

### AICIA — R&D Engineer
- **Contract title:** Técnico de segunda (Technician), October 2008 – October 2013; Ingeniero de I+D (R&D Engineer), October 2013 – June 2015 (promotion upon completing the degree)
- **Working title:** R&D Engineer (electronics, firmware, projects) — systems and prototype architect

**16 October 2008 – 30 June 2015 | Sevilla, Spain**

**Context:** Began engineering work prior to completing university studies, subcontracted by external company [Temai Ingenieros S.L.](http://www.temai-ingenieros.com) for prototype development, contributing to R&D projects that advanced state-of-the-art technologies in fiber optics and laser systems. Collaborated under Dr. Francisco Rogelio Palomo to design prototypes, redefine FBG interrogator capabilities, and deliver market-oriented solutions.

**Key Projects:**

- **TMBragg 1 — FBG interrogator based on tunable laser under FPGA** (Ref. PI-0164/2008, 16 October – 21 December 2008): hired to write the firmware (C on the MicroBlaze soft core embedded in a Xilinx Spartan 3E FPGA, Xilinx XPS) of a prototype DAQ/tunable-laser controller that had never been made to work — a Spartan 3E development board plus a signal-conditioning board built on transimpedance and transinductance stages. Implemented the manufacturer's control algorithm (pattern generation on the DACs, readback on the ADCs), calibrated the analog signal channels, ran safety tests, uncovered and fixed multiple hardware and electronics problems, and finished it into a functional tech demonstrator deployed in the field (MVP).
- **TMBragg 2 — Prototype, Hardware, and Software Analysis of Laser Interrogator** (1 February – 19 October 2009): made the analog electronics actually work — the dynamic ranges of the successive stages were misaligned, saturating on one side or the other and leaving an effective control precision of only ~4-5 bits. Analyzed and recalibrated the analog circuits (circuit theory, Spice/PSpice simulations, MATLAB), adapting transimpedances and transinductances and retuning input/output impedances by changing discrete component values, so that each analog input and output's dynamic range matched the device on the other end — the TMBragg 1 controller's DACs/ADCs on one side and, on the other, an experimental tunable laser by Syntune (S3500, from a European framework innovation programme). Brought the prototype to working condition (hardware in Altium PCAD; firmware in C, Xilinx SDK), giving the project the oxygen to earn a full redesign; end goal: drive the laser and interrogate FBG sensors embedded in optical fiber.
- **TMBragg 3 — High-Performance Laser Interrogator Based on Low-Cost FPGA** (20 October 2009 – 31 December 2010 per the project certificates; the work then continued and was refined in parallel with PROSAVE2, and was presented as his MSc thesis in October 2013): launched a complete electronics redesign, from schematic to production — a Xilinx Spartan 6 control board with volatile and non-volatile memory, digital peripheral control (thermometers, user interface) and analog control (DAC/ADC), designed specifically to maximize the control capabilities of the Syntune S3500 and S3700 tunable lasers through the signal-conditioning board optimized in TMBragg 2. Drew the PCB on 6-layer FR4 with through vias, optimizing trace distances and impedance matching on isochronous data buses, and adapted the analog channels for near-perfect signal matching through two 40-pin connectors sandwiching the TMBragg 2 board on top. Ran all pre-production tests and simulations, adapted his own firmware to the new hardware, recalibrated the LUTs, and documented the work as an industrial deliverable for later industrialization, testing, and certification. Result versus TMBragg 2: 400× faster laser tuning, with precision and repeatability improved by more than an order of magnitude (>10×). Roles: project management; firmware development (C on MicroBlaze, Xilinx XPS/SDK); electronics and PCB design (Altium PCAD/Designer); high-performance data acquisition design. The functional prototype was the technology demonstrator of a broader technology later patented by Temai Ingenieros S.L.
- **PROSAVE2 — Structural Sonar with Fiber Optic Sensors for Aerostructures** (Ref. PI-0719/2010, 18 May 2010 – 31 December 2013): built, within a work package of the CENIT PROSAVE2 aeronautics programme, a PoC demonstrator using FBG sensors as detectors of surface ultrasonic (Lamb) waves on aeronautical aluminum structures — rosettes of three FBGs in an equilateral triangle, glued bare to the plate with cyanoacrylate, exploiting the sensors' directionality (signal amplitude depends on the wavefront's angle of attack). Built and operated the instrumentation end to end himself: broad-spectrum LED light sources, EDFA optical amplifiers, electrically amplified broad-spectrum photodetectors, paired FBG sensors, low-noise high-speed oscilloscopes, and two NI-PXI systems on LabVIEW RT for excitation and DAQ, plus ad-hoc devices designed in-house. Wrote all the software — signal generators with waveforms designed specifically to avoid standing-wave problems, DAQ, and signal processing — and designed a genetic-algorithm signal-reconstruction system to compose the data and locate defects in the structure, defects simulated non-destructively with 500 N magnets clamped on both sides of the plate; triangulated the magnets' positions using low-SNR signals. Also: designed a hybrid ultrasonic-FBG system for structural health monitoring (SHM); optimized signal integrity and EMI through impedance matching studies. Roles: laboratory technician; scientific/simulation designer; software developer (LabVIEW, MATLAB, C, AutoCAD); hardware and prototyping designer; project/supplier management; researcher.
- **Sonar Laser — Market Adaptation of Structural Sonar Prototype** (Ref. PI-1292/2014, 10 June 2014 – 31 December 2014; the project formally closed then, but the work and demonstrations continued until the end of his AICIA contract in June 2015): born from his own idea — improve the PROSAVE2 PoC by redesigning the optical chain, using a narrow-linewidth tunable laser source (bandwidth comparable to the FBGs' own) to replace both the broadband source and the filter bank, with his TMBragg 3 prototype as the driver. The gain in signal was enormous; the price was interrogating the sensors one at a time — synchronized periodic emission with windowed decoding, combined afterwards in deferred analysis (removing the need for real-time DAQ). Modified the TMBragg 3 firmware into a peripheral and designed a master-slave communication protocol and an API over it — a LabVIEW master on a PC simultaneously orchestrating the TMBragg (over a UART with ASCII messages, for both control and the log of internal data and readings) and an oscilloscope, analyzing data offline while the next capture ran. The famous signal decode at −60 dB SNR was achieved with this device, recovered through combined hardware improvements and signal processing. Proposed the idea, designed the architecture and the work bench, wrote the software (C, LabVIEW, batch scripts), and built and demonstrated the PoC; adapted research prototypes into market-ready products.
- **FBG@nTOF (with CERN):** placed fiber-optic FBG sensors in a very intense neutron radiation beam at CERN's nTOF facility and demonstrated they were inert to it — making them ideal temperature/strain sensors for radiation areas.
- **3D silicon detectors (radiation sensors, nTOF):** built the experimental bench and DAQ for the 3D silicon detector measurements of his supervisor's PhD thesis; mounted the pieces in the field at nTOF, monitored the experiment, and hosted the data through delivery. This work is the direct thread to his later hiring at CERN, where he did the same class of work many more times.

**General Responsibilities & Achievements:**

- Redefined the state of the art of tunable laser-based FBG interrogators through iterative prototyping.
- FPGA logic: integrated and lightly modified VHDL IP blocks prepared by VHDL specialists; his own development targeted the MicroBlaze soft core (C firmware) and the surrounding electronics and PCBs.
- Delivered two advanced prototypes and a technology demonstrator for acousto-optic delamination detection in carbon fiber structures.
- Designed LabVIEW RT systems using National Instruments PXI hardware for precision control in fiber-optic sensor projects.
- Developed analog, digital, and integrated automatic control systems for laser interrogators and industrial automation.
- Signal Integrity: optimized impedance matching and signal treatment for laser interrogators; validated ADC/DAC performance and signal integrity for the TMBragg interrogators.
- ADC/DAC: designed analog/digital control systems for fiber-optic sensors.
- AutoCAD: engineered mechanical components for FBG interrogators.
- Research: conducted fundamental research on tunable lasers, contributing to the TMBragg designs that underpinned Temai's patented technology.
- Executed Agile prototyping and Waterfall documentation for FPGA-based laser control systems.
- Project Management: led teams, managed suppliers, and coordinated with external partners (e.g., mechanical workshops); administered computing clusters for simulations and data processing.
- Outcomes included the patented-technology demonstrator (TMBragg 3) and market-adapted products (Sonar Laser), with contributions covered under NDAs.

**Collaborations:** CERN (FBG@nTOF, 3D silicon detectors at nTOF), ESA (REXUS-BEXUS experiments; presented at ESTEC, the Netherlands), Airbus; IFCA (Instituto de Física de Cantabria, Santander); multiple Universidad de Sevilla departments (aerospace engineering, materials science, applied mathematics) and the aerospace engineering department of UPM (Madrid); academic and industrial partners for functional technology demonstrators.

**Technical Environment:** Electronics: Xilinx FPGAs (MicroBlaze soft core), analog/digital control systems, impedance matching, signal integrity. Programming: C (firmware on MicroBlaze), LabVIEW 7–2014 (LabVIEW RT on NI PXI), MATLAB, SQL, PHP, HTML/CSS; VHDL limited to integrating and lightly modifying IP blocks prepared by VHDL specialists. CAD: Altium Designer/PCAD, AutoCAD, Autodesk Inventor. Instrumentation: Fiber Bragg Grating (FBG) sensors, ultrasonic emitters, 3D silicon detectors (radiation sensors).

**Tags:** `photonics` `fiber-optics` `fbg-sensors` `tunable-lasers` `laser-interrogators` `fpga` `xilinx` `microblaze` `c` `labview` `labview-rt` `ni-pxi` `matlab` `altium` `autocad` `pcb-design` `daq` `adc-dac` `signal-integrity` `signal-processing` `impedance-matching` `emi` `shm` `structural-health-monitoring` `aerospace` `aerostructures` `carbon-fiber` `sonar` `ultrasonics` `delamination-detection` `radiation-sensors` `ntof` `patents` `prototyping` `tech-demonstrator` `market-adaptation` `master-slave-protocols` `uart` `project-management` `supplier-management` `research` `r&d` `cern-collaboration` `esa` `airbus` `nda` `early-career-to-mid`

---

### Universidad de Sevilla — Computer Systems Engineer / IT Responsible
- **Contract title:** Técnico especialista (Specialist Technician)
- **Working title:** Systems engineer; IT lead and user support for the research group

**1 August 2010 – 30 June 2015 | Sevilla, Spain**

**Department:** Aerospace Engineering and Fluid Mechanics, Engineering School of Sevilla. Led IT infrastructure as IT Division lead for the [Fluid Mechanics research group](http://grupo.us.es/gimfus). (Role held in parallel with AICIA — both within the same campus complex; in the later years the systems were solid enough that the role became on-call.)

**Key Contributions:**

- System Administration & Network Management: administered a private network and server farm, including Linux server cluster administration (CentOS, Ubuntu, Red Hat, Scientific Linux (SLC)) for supercomputing and numerical simulations; redesigned and upgraded the internal private network, purchasing and setting up new servers and clusters.
- Security: established network policies and firewall rules; implemented firewall policies and cybersecurity protocols; provided cybersecurity training.
- Automation: automated workflows and server tasks via Bash scripts; wrote a small Java backend for early warning of server crashes or looming overload; WinServer administration with automated workflows via PowerShell scripting; managed backup and printing services.
- IT Infrastructure Development: designed, developed, and launched new ad-hoc services, including backup solutions and printing systems; managed software systems, server maintenance, and computer security protocols; maintenance protocols for supercomputing clusters and user-facing services.
- Virtualization: virtualized supercomputing clusters with VMware for fluid dynamics simulations; supervised supercomputing environments and simulation tools.
- Support & Consulting: provided L1–L3 user support; acted as consultant for hardware procurement, software debugging for parallelization, and user support; provided creative technical solutions for supercomputing, CAD, and simulation tasks; collaborated on projects requiring high-performance computing for aerospace engineering applications.
- Implemented teleworking tools and supercomputation systems.
- Environments: Linux-based systems (CentOS, Red Hat, Ubuntu, Scientific Linux (SLC)), Windows, macOS; tools such as MATLAB and AutoCAD for engineering simulations and mechanical design.

**Teaching, Mentorship & Community:**

- Mentored undergraduate interns and managed student projects; served as tutor for high school students, enhancing communication and leadership skills.
- Managed the Superior School of Engineering culture club; organized recreational events and collaborated with student offices.

**Recommendation Letters:**

- Dr. Antonio Fernandez García-Navas (Head of Aerospace Engineering Dept.): highlighted leadership in IT infrastructure and supercomputing.
- Dr. José Manuel Gordillo (Fluid Mechanics Professor): praised problem-solving skills and contributions to research productivity.

**Technical Environment:** Network administration, server clusters, cybersecurity; Linux/Unix, Windows, macOS; parallel computing, hardware troubleshooting, software optimization; Java (server-monitoring backend), SQL, MATLAB, Bash, PowerShell, PHP; AutoCAD, Altium Designer, Xilinx Suite.

**Tags:** `sysadmin` `it-infrastructure` `linux` `centos` `ubuntu` `redhat` `windows-server` `macos` `hpc` `supercomputing` `cluster-administration` `numerical-simulation` `fluid-dynamics` `aerospace` `vmware` `virtualization` `networking` `firewall` `cybersecurity` `bash` `powershell` `java` `sql` `php` `backup-systems` `user-support` `l1-l3-support` `it-consulting` `hardware-procurement` `parallelization` `teleworking` `mentoring` `teaching` `community-leadership` `recommendation-letters`

---

### Freelance & Early Career

- **Freelance Network Installer | April 2004 – July 2010:** Designed and maintained computer networks.
- **Deputy Commercial Director (Tecnisol/Eires) | 1999–2001:** Managed door-to-door TV sales teams.

**Tags:** `networking` `freelance` `self-employed` `sales` `sales-management` `commercial` `team-management` `early-career`

---

## Personal Projects

- **SuPurrMente** — single-container cat-health monitor built around a Litter-Robot 4's unofficial API, evolved from an earlier Home Assistant-based implementation into a from-scratch system for indefinite data persistence, continuous analysis, and the detection of patterns indicative of illness with automatic email alerts (Starlette/uvicorn, APScheduler, Datasette, oauth2-proxy; three processes under three isolated system users): per-cat visit classification via dynamic moving-average threshold with a least-squares/MAD crosscheck, email health alerts, SQLite+CSV storage, Chart.js dashboard, and NAS backups under a consistency contract with atomic publication. ~2,200 LOC plus a 153-test suite; one-command encrypted-secrets deploy to a Raspberry Pi; public on GitHub ([github.com/Alkaronyan/SuPurrMente](https://github.com/Alkaronyan/SuPurrMente)).
- **GLNode** — private infrastructure project (see the Gonzalez.team entry): international mesh-VPN device network (WireGuard/OpenVPN, Docker, Debian/Raspbian on Raspberry Pi; 7 nodes, 3 countries; first nodes deployed 2022, formalized as GLNode24 in 2024).
- **cv_creator / JobHunter** — private; described in full in the Gonzalez.team entry.

**Tags:** `personal-projects` `open-source` `flask` `python` `docker` `vpn` `self-hosted`

---

## Technical Skills (Global Summary)

**Programming & Tools:**

- Expert: C, LabVIEW (CLAD certified), C#/.NET
- C++ (Cogito integration layer between firmware and the C#/.NET application — see Cogito entry)
- Advanced: Python, JavaScript, Bash
- Others: PHP, HTML/CSS, MySQL/SQL, MATLAB, Java, PowerShell, Visual Basic, TypeScript
- Frameworks & Tools: Git/SVN/GitLab, VMware, Altium, Autodesk Inventor/Fusion, AutoCAD, AWS Cloud, Visual Studio/Code, NI PXI, ESP-IDF, Xilinx Suite (XPS/SDK), Docker/Docker Compose, Flask, Playwright, pytest
- AI / LLM engineering: LLM APIs (Anthropic Claude, Google Gemini, DeepSeek), prompt engineering, multi-agent orchestration, anti-hallucination auditing, prompt caching, quota-aware scheduling, structured (JSON) model output with tolerant parsing

**Hardware/Embedded Systems:**

- Microcontrollers (ESP32, STM32, MicroBlaze), FPGA-ARM co-design, PCB design (Altium), DAQ systems, sensor characterization
- FPGA (10+ years): work targeting soft cores (MicroBlaze) and Zynq ARM, alongside VHDL specialists; VHDL itself limited to reading and minor IP modifications
- Specialized: RTOS (FreeRTOS/ESP-IDF), ARM/Zynq, IoT/edge pipelines, radiation-hard sensors, energy harvesting, thermal/Peltier systems, EMI analysis, impedance matching
- IoT & Home Automation: Home Assistant, Zigbee, Tuya, TTLock, custom integrations

**Methodologies:**

- Agile lifecycle management, Waterfall, hardware-software co-design, SDLC compliance, prototyping-to-production, DVT/traceability, pFMEA, PMI-PMP project management, test-driven development with a continuous integration & testing discipline (the test is designed before the thing it tests; practiced as a working habit at Cogito, LEM, and Gonzalez.team, independent of any specific CI/CD toolchain), agent-based development workflows, documentation methodology (living docs vs append-only session log)

**Tags:** `c` `cpp` `labview` `csharp` `dotnet` `python` `javascript` `typescript` `bash` `powershell` `vhdl` `php` `html-css` `mysql` `matlab` `java` `visual-basic` `git` `svn` `gitlab` `vmware` `altium` `autodesk` `autocad` `aws` `visual-studio` `ni-pxi` `esp-idf` `xilinx` `esp32` `stm32` `microblaze` `fpga` `arm` `zynq` `rtos` `freertos` `pcb-design` `daq` `iot` `edge-computing` `radiation-hard` `sensor-characterization` `agile` `waterfall` `sdlc` `hw-sw-codesign` `pmp` `docker` `flask` `playwright` `pytest` `llm` `prompt-engineering` `multi-agent` `home-automation`

---

## Publications & Talks

**Peer-reviewed publications:**

- D. González-Díaz, F. R. Palomo, **J. González**, H. Chen, «Detectors and Concepts for sub-100 ps timing with gaseous detectors», *JINST* 12 (2017) C03029 — proceedings of the 13th Workshop on Resistive Plate Chambers and Related Detectors (RPC2016, Ghent). DOI: [10.1088/1748-0221/12/03/C03029](https://doi.org/10.1088/1748-0221/12/03/C03029), arXiv: [1606.08172](https://arxiv.org/abs/1606.08172). Author affiliation: CERN Physics Department and CIEMAT (Madrid).
- A. Heering, Yu. Musienko, **J. Gonzales**, A. Karneyeu, M. Wayne, R. Ruchti, M. Moll, «Low temperature characteristics of SiPMs after very high neutron irradiation», *Nucl. Instrum. Meth. A* 936 (2019) 671-673 — 14th Pisa Meeting on Advanced Detectors (Elba, 2018). DOI: [10.1016/j.nima.2018.09.111](https://doi.org/10.1016/j.nima.2018.09.111). (Surname cited as published.)

**Talks & conference contributions:**

- **CALOR2018 (Eugene, Oregon, USA, 25 May 2018):** «Detector performance studies for the CMS High Granularity Calorimeter» — 20-minute project-status talk, delivered personally. Indico: [indico.cern.ch/event/642256/contributions/2966166/](https://indico.cern.ch/event/642256/contributions/2966166/).
- **FAST Congress (Ljubljana, Slovenia) and 14th Pisa Meeting (Elba, 2018):** co-authored SiPM irradiation work, presented by A. Heering.
- **RD50 workshops (2015–2018):** participated in all workshops of the period (Geneva: Dec 2015, Dec 2016, Nov 2017; Krakow: Jun 2016) and co-organized, in a support role, the CERN-hosted ones; co-authored contributed work presented by colleagues (no first-author talks).
- **REXUS-BEXUS (ESA student programme):** presented at ESTEC (the Netherlands), February 2009, the project of flying a commercial 45 nm FPGA to space to measure radiation effects and bitflip probability in 45 nm fabrics.

**Tags:** `peer-reviewed` `jinst` `nim-a` `doi` `arxiv` `calor2018` `conference-speaker` `rd50` `rexus-bexus` `esa` `scientific-communication`

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## Additional Information

- **Patents:** MSc-thesis work (TMBragg 3, AICIA) produced the technology demonstrator of a broader technology later patented by Temai Ingenieros S.L. (the patent belongs to the company; his contribution was the demonstrator).
- **Collaborations (career-wide):** CERN, CIEMAT, IFCA, CNA, IMB-CNM, ESA, Airbus, SunRock Technologies, Clemessy (Eiffage), GF Machining Solutions / Charmilles, Caran d'Ache, Angara Technologies, Fortil, Temai Ingenieros, Universidad de Sevilla and UPM departments, 10+ international institutions.
- **Volunteering:** Organized youth cultural events and university clubs; managed the Superior School of Engineering culture club.
- **Recommendation letters:** at least two per position (AICIA, Universidad de Sevilla, CERN, Cogito); none from LEM. The two Universidad de Sevilla letters are cited in that entry.
- **Strengths:** Fast learner and rapid technology adopter; adaptable across domains (photonics, particle physics, industrial AI, IoT metering, LLM systems); team player; cost-performance optimization; bridging business and technical sides — from board-to-developers liaison (LEM) to C-suite and customer-facing engineering (Cogito).

**Languages:**

- Spanish (Native, C2)
- English (Professional, C1)
- French (A2/B1, FIDE certified)

**Tags:** `patents` `international-collaboration` `volunteering` `technical-commercial-bridge` `cost-optimization` `spanish-native` `english-c1` `french-a2-b1` `fide-certified`